1. Field of the Invention
The present invention relates to an A/D converter for converting analog input signals into digital signals.
2. Description of the Prior Art
FIG. 9 is a block diagram of the configuration of a conventional A/D converter which is commonly used. In the figure, reference numeral G represents a channel selector for selecting one of a plurality of channels having analog input signals 10, 7 a comparator for comparing a changing reference voltage and the voltage of an analog input signal selected by the selector 6, 8 a successive approximation register for storing the comparison result of the comparator sequentially, 3 a conversion result storage register (a 3-word register in this case) for storing the data of the successive approximation register 8 as the result of conversion, 1 a channel selection register for storing channel selection information for the channel selector 6 to select one of the analog input signal channels, 2 a mode register for storing mode information such as starting factors, A/D conversion speed, and A/D conversion operation modes, 9 a D/A converter for converting the data of the successive approximation register 8 into an analog signal to provide this conversion result to the comparator 7 as a reference voltage, 11 a start control circuit for controlling the activation of the A/D converter according to a given starting factor 12, 5 a control circuit for controlling the channel selector 6 according to the outputs of the channel selection register 1, the mode register 2 and the start control circuit 11, and 13 an interrupt request signal outputted from the successive approximation register 8 and supplied to a CPU to inform the completion of conversion.
The operation of the A/D converter will be described hereafter. In advance, channel selection information is set in the channel selection register 1 and mode information is set in the mode register 2. The channel selection register 1 is intended to select an arbitrary analog input signal from a plurality of analog input signals 10. The mode register 2 is intended to determine the operation mode of the A/D converter. Generally, A/D conversion modes include one in which A/D conversion is performed only once after the start of operation, one in which A/D conversion of the same channel of analog input signals into digital signals is repeated, and one in which a plurality of channels having analog input signals are converted into digital signals one after another. As shown in FIG. 9, when there are a plurality of starting factors 12, the mode register 2 is provided with a bit for specifying a starting factor.
Generally speaking, the starting factors are written onto an (unshown) starting register by software, or external events are directly inputted as the starting factors. FIG. 9 shows an example where two starting factors can be selected by the mode register 2.
Therefore, after setting values to the channel selection register 1 and the mode register 2, the A/D converter is activated to begin A/D conversion. A/D conversion of one bit at a time starting from the most significant bit of the analog input signal of a channel selected by the channel selector 6 is performed through the comparison of the voltage of the analog input signal and the output (reference voltage) of the D/A converter 9 with the comparator 7, and the result of comparison is stored in the successive approximation register 8. When A/D conversion of all the bits of the analog input signal is completed, the results of conversions are transferred to the conversion result storage register 3 by the unshown CPU.
Since the conventional A/D converter has only one channel selection register, mode register and conversion result storage register, one starting factor must be selected during the system design stage for dedicated use. Therefore, when a plurality of starting factors are required, the CPU must accept the starting factors and the A/D converter must be activated by software. In this way, since the processing of the CPU intervenes in A/D conversion and other processes, response speed to the starting factors is significantly lowered. For example, when such a conventional A/D converter is used in the control system of a car engine, analog information (first starting factor), such as the crank angle (related to the amount of gasoline injection) and engine speed, required on a real-time basis, and analog information (second starting factor), such as the engine coolant temperature, required at predetermined intervals, are converted into digital information through the CPU, thus lowering response speed to the first starting factor in particular.